1. Field of the Invention
This invention relates to electronic signal processing and in particular to a digital input/output buffer used to buffer signals to and from logic implemented in an integrated circuit chip and an external interface system and for a mixed voltage, multi-rail, power supply environment.
2. Related Art
It is well known in the art of electronic signal processing that an input/output (IO) buffer is required when signals are transferred from logic included on an integrated circuit chip, or other electronic device, to an interface system external to the chip or electronic device. Prior art input/output buffers typically include pull-up and pull-down transistors driven by NAND and NOR gates respectively, where both the NAND and NOR gates are driven by an output enable signal and an input signal (i.e. the signal to be transferred). Furthermore, at times more than one pull-up and pull-down transistor has been used in parallel with or without an RC delay network. RC delay is provided by a series of capacitors and resistors configured in RC delay networks; the resistances and capacitances can either be lumped or layout parasitics. Such prior art buffers serving as delay elements hence use analog devices, as opposed to the digital devices generally employed by the integrated circuit chip logic and external interface systems. This limitation increases system cost and complicates fabrication With multiple pull-up/pull-down transistors, this type of design does not address the issue of multi-stage firing control, sequencing of the transistor firing, noise and short circuit current (also known as shoot through current or crowbar current). (The process of turning a transistor on is also referred to as "firing" the transistor.)
In addition, it is often desirable to use one supply voltage to operate the logic included on the integrated circuit chip and a different supply voltage for the external interface system. Consequently, it is desirable to have an input/output buffer capable of handling two different supply voltages and which can translate logic signals operating at the first supply voltage to the second supply voltage. For instance, two voltages commonly used art are 3.3 volts, which is generally considered a low noise voltage, and 5.0 volts, which is generally considered to be a noisy voltage supply. Both 3.3 volt and 5.0 volt power supplies typically include a margin of error of .+-.10%.
What is needed is an input/output buffer which uses all digital components (i.e., no resistors or capacitors) and can easily be included on the integrated circuit chip or the external interface system. "Digital components" refers here to transistors. Ideally the input/output buffer operates in a mixed voltage, multi-rail, power supply environment and provides minimal introduction of noise into the data signal. The input/output buffer should also be compatible with the PCI and VL bus electrical characteristics.